TAPES3

Technology Advances for Pilot line of Enhanced Semiconductors for 3nm

The overall objective of TAPES3 is to support the continuation of Moore’s law in line with the worldwide industry roadmap. Focus is on exploring and preparing the next innovations required to bring the industry’s capability in the fields of lithography, patterning, metrology, mask infrastructure and process modules to the levels required for creating 3nm products. To enable the industry to keep on Moore’s law projection, 3nm pilot manufacturing capability needs to be ready by 2022.

This objective requires not only bringing EUV lithography resolution, focus control, overlay performance and productivity to the next level, but also paying attention to process, device architecture and design solutions to effectively reap the benefits of 3nm technology at system level. Solutions required need to be sought in lithography, optics and metrology improvements, mask manufacturing, patterning, alignment, particle control, device architecture, standard cell and logic design. It is the combination of advancements in all these areas that eventually enable effective application of 3nm process technology in next generation product development. In TAPES3 a consortium of worldwide leading edge companies collaborate and take on the challenge of finding solutions to enable the next generation technology – the 3nm.
The project touches the core of the continuation of Moore’s law. Moreover, the cost aware development process will support the involved companies, and will place them in a preferred position compared to  their worldwide competition. Through their worldwide affiliations, the impact of the TAPES3 project will be visible outside of Europe, in American and Asia Pacific semiconductor centres, and is expected to have a large benefit to the European economy by supporting its semiconductor equipment and metrology sectors with innovations, exports and employment.

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Frans List
frans.list@asml.com
ASML Netherlands
10/2018
36 months
M€ 123.5
27
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Technology Advances for Pilot line of Enhanced Semiconductors for 3nm